Memory, Paging, and The Hardware Illusion

In the previous chapter, we saw something curious in the readelf -l output:

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LOAD           ... RWE 0x1000

And your linker script had this instruction:

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. = 0x80000000;

Why 0x1000? Why does the hardware care? And does your code really live at 0x80000000 inside the physical chip? Let’s pull back the curtain on one of the most important illusions in computer science: Memory Management.

1. The Notebook Analogy: What is a Page?

Imagine the memory (RAM) of your computer not as a “giant bucket of billions of bytes”, but as a Ring Binder Notebook.

• Each sheet of paper in this notebook is called a Page.
• The processor doesn’t manage memory byte-by-byte for everything; it prefers to move, protect, and map entire sheets (pages) at a time.

This system is called Paging. It is how the hardware (specifically the MMU - Memory Management Unit) forces order onto the chaos of billions of memory cells.

2. Why 4KB (4096 bytes)?

In the readelf output, we saw Align 0x1000. In decimal, 0x1000 is 4096. This is the standard size of one memory page. It became the industry standard (from the Intel 80386 and VAX days) because it sits in the “Goldilocks Zone”:

1. Not too small: If pages were tiny (e.g., 100 bytes), your notebook would need billions of sheets. The “Table of Contents” (Page Table) needed to track them all would be gigantic, consuming more RAM than your actual programs!

2. Not too big: If pages were huge (e.g., 1MB), you would waste space. Imagine needing to store a tiny 1KB text file. The system would have to rip out a whole 1MB sheet just for that small note. The rest of the page would sit empty. This is called Internal Fragmentation.

4KB is the sweet spot: small enough to be efficient, big enough to manage easily.

This is why the linker aligns segments to 0x1000: it is saying “Start this section on a fresh new page.”

3. The Grand Illusion: Virtual vs. Physical

Here is the secret: Your program is hallucinating.

The Program’s View (Virtual Memory)

Your program sees a perfect, contiguous block of memory.

• Page 1: 0x80000000 (Your Code)
• Page 2: 0x80001000 (Your Data)
• Page 3: 0x80002000 (Your Stack)

“Everything is neat, tidy, and right next to each other.”

The Hardware’s View (Physical Memory)

The MMU takes those virtual pages and scatters them wherever there is free space on the actual RAM chips.

• Page 1 (Code) → Might be at Physical Address 0x9000F000 (near the end of the stick).
• Page 2 (Data) → Might be at Physical Address 0x00004000 (right at the start).
• Page 3 (Stack) → Might be at Physical Address 0x12345000 (somewhere in the middle).

The hardware maintains this illusion so the OS can defragment memory without your program ever knowing.

4. The Translator: Page Tables

How does the CPU know that Virtual 0x80000000 is actually Physical 0x9000F000? It uses a look-up table called the Page Table, which lives in RAM (Physical Memory).

The “Boss” Register: satp

The CPU needs to know where this table lives. In RISC-V, this location is stored in a privileged register called satp (Supervisor Address Translation and Protection). (In x86, this is called CR3).

The Speed Hack: TLB

Reading this table from RAM for every single instruction would make the computer incredibly slow (it would double memory traffic). To fix this, the CPU has a tiny, ultra-fast internal cache called the TLB (Translation Lookaside Buffer). It remembers recent translations:

“I just checked 0x80000…, it’s at 0x9000F… Don’t bother checking the RAM index again.”

5. Where is the MMU? (Hardware vs. Kernel)

The MMU (Memory Management Unit) straddles the line between hardware and software. Here is exactly where it lives and who controls it:

5.1. In Hardware (The Enforcer)

The MMU is a physical silicon circuit inside the CPU (or SoC).

• Location: It sits between the CPU core (which executes instructions) and the memory bus (RAM).
• Job: It intercepts every single memory address the CPU tries to access. It automatically translates “Virtual Address → Physical Address” and checks permissions (Read/Write/Execute) purely in hardware, without slowing down the CPU.

5.2. In Kernel/Software (The Manager)

The MMU is “dumb” hardware that follows rules. The OS Kernel (Software) creates those rules.

• Page Tables: The Kernel writes data structures (Page Tables) into RAM that map virtual addresses to physical ones.
• Control Registers: The Kernel tells the physical MMU where to find these tables by writing to a specific CPU register (e.g., satp on RISC-V, CR3 on x86, or TTBR on ARM).

5.3. Summary

• Hardware: usage → The MMU circuit performs the translation live.
• Kernel: setup → The OS fills out the “forms” (Page Tables) that the MMU reads.

6. Kernel vs. User (Who holds the keys?)

Can your program see the Page Tables? No.

• The Kernel (Ring 0 / Supervisor Mode): It owns the memory. It writes the Page Table into RAM and sets the satp register. It decides who lives where. It must be able to read/write the table to launch programs.

• The User (Ring 3 / User Mode): It is just a tenant.

  • If you try to read satp? Illegal Instruction Exception. The CPU crashes your program.
  • If you try to read the Page Table from RAM directly? Impossible. Your program cannot issue physical addresses. It can only issue Virtual Addresses. Even if you know the physical address is 0x9000F000, if you try to read from 0x9000F000, the MMU treats that as a Virtual address. Page Fault. The CPU sees you accessing memory you don’t own and crashes your program. You are trapped in the Matrix.

7. Summary

1. Pages: Memory is managed in 4KB “sheets”, not bytes.
2. Alignment: Linkers aim for 0x1000 alignment to fit these pages perfectly.
3. Virtual Memory: Programs see a simplified, contiguous fantasy.
4. Physical Memory: The reality is scattered and fragmented.
5. Page Tables: The dictionary mapping Fantasy → Reality, managed by the Kernel.
6. MMU: The hardware circuit that intercepts every memory access and translates it.
7. Kernel: The software that sets up the Page Tables and tells the MMU where to find them.

This infrastructure is what allows multiple programs to run at once without crashing into each other. Each one gets its own private “Notebook” (Virtual Address Space), unaware that they are all sharing the same physical desk.