Experimenting with RISC-V

Hands-on chapters exploring RV32 bare-metal development, tooling, and experiments.

Preface

Introduction

RISC-V Architecture Overview

Setting Up the Toolchain and QEMU

Basic RISC-V Assembly Instructions

ELF Internals and Binutils: Seeing What the Compiler Produced

Memory, Paging, and The Hardware Illusion

RV32 ABI and C Data Types: Sizes, Alignment, and Layout

C → Assembly: Optimizations, Volatile, and What the Compiler Is Allowed to Do

Control Flow and Data Access in RV32 Assembly

Functions, Calling Convention, and Stack Frames

Linker Scripts, Sections, and Memory Maps

Floating Point, Endianness, and Bit-Packing (Verifying with Python)

Firmware Triage and Reverse Engineering Workflow

Dynamic Analysis with QEMU Tracing

Interfaces in QEMU: UART and MMIO Concepts

Capstones and Next Steps

Series Summary

Troubleshooting

Glossary

Appendix: Resources

Contact